2D materials & devices with a focus on high-density logic and memory. We aim to identify and realize 2D materials with high carrier mobility, to develop synthesis strategies to obtain high quality 2D materials at BEOL compatible temperatures, to demonstrate multi-channel 2D-nFET outperforming silicon at 1 nm node and beyond, and to improve 2D-pFET doping, lower defects, compare 1L vs. 2L, target I_D > 750 μA/μm, R_C < 200 Ω⋅μm. PIs: Feliciano Giustino, Jing Kong, Tomas Palacios, Eric Pop, Farhan Rana, Elton Graugnard, Steve George, Pillar tasks: 3137.001, 3137.028, 3137.029, 3137.030, 3137.031, and 3137.043.

Nitride materials & devices for analog, power, and mixed signal applications. SUPREME strives to develop high-mobility p-type GaN channels, to explore sub-THz high-efficiency materials and devices, to develop dual-gate and nano-sheet-based GaN transistors to improve VT control and operating frequency, and to explore design space for GaN-on-Si HEMTs to have better performance than GaN-on-SiC. PIs: Debdeep Jena, Grace Xing, Tomas Palacios, James Hwang, Feliciano Giustino, Pillar tasks: 3137.003, 3137.004, 3137.005, 3137.006, and 3137.007.

Oxide materials & devices to develop n-type and p-type oxide semiconductors with mobility >30 cm2/V-s and better reliability. Work includes fabrication of In₂O₃-based amorphous oxide semiconductors with various dopant/alloy species for n-channel, MBE growth of K-doped SnO and PdO for p-channel, optimization of the processing conditions for each composition and down selection of most promising materials for further optimization/improvement. PIs: Christopher Hinkle, Kai Ni, Asif Khan, Darrell Schlom, Grace Xing, Pillar tasks: 3137.011, 3137.013, 3137.037, and 3137.033.

Ferroelectric memories & benchmarking towards high-density memory. Objectives include, to realize ultra-low voltage and high-speed operation of embedded applications, to enable performance augmentation of DRAM and flash technologies using ferroelectric memories, and to explore novel architectures and new applications leveraging unique features of ferroelectrics. PIs: Asif Khan, Kai Ni, Michael Niemier, Pillar tasks: 3137.022, 3137.012, 3137.013, 3137.018, 3137.027.

Spintronic materials & devices for logic and memory applications. Work includes to reduce the writing currents of spintronic device to enable higher density, to increase the read signals for higher memory window, to reduce sensitivity of magnetic information storage element to external magnetic field, and to take advantage of unique dynamics of nanomagnets and new topological effects for new computing schemes. PIs: Dan Ralph, Luqiao Liu, Farhan Rana, Darrell Schlom, Michael Niemier, James Rondinelli, Pillar tasks: 3137.009, 3137.010, 3137.014, 3137.015, 3137.016, 3137.045.

Ionic materials & devices for neuromorphic and other unconventional memory and compute applications, including AI hardware. SUPREME work focuses on demonstrating memories with programmable and deterministic conductance characteristics, and fast (ns), energy efficient (aJ) and low voltage ( ≤1V) modulation. PIs: Bilge Yildiz, Farnaz Niroui, Jing Kong, Asif Khan, Judy Cha, Tomas Palacios, Kai Ni, Michael Niemier, Pillar tasks: 3137.008, 3137.017.

Electrical interconnects to develop high-conductivity narrow interconnects. Current work includes to identify materials with high conductivity at small < 10 nm dimension, to develop thin film synthesis methods including control of composition and crystalline direction, to develop nanowire fabrication processes, and to demonstrate high-conductivity narrow wires with < 400 Ω/μm for 8 nm line width. PIs: Daniel Gall, Judy Cha, Christopher Hinkle, Hong Tang, James Rondinelli, Pillar tasks: 3137.019, 3137.020, 3137.021, 3137.026, 3137.038, 3137.046.

Optical interconnects towards power and size efficient chip to chip optical interconnects. SUPREME focuses on the development of new materials and devices for optical interconnects, to reduce the size and power consumption of optical components for interconnects, to develop compact broadband optical modulators for BEOL placement and nanoscale directly modulated optical light sources for BEOL placement. PIs: Hong Tang, Chris G. Van de Walle, Debdeep Jena, Farhan Rana, Pillar tasks: 3137.023, 3137.022, 3137.034.

Metrology to develop rapid techniques for material and device characterization. Objectives are to measure and characterize the properties of materials being developed in the center, to develop techniques for the high-throughput characterization of materials and devices and provide feedback to material synthesis and computational modeling teams in the center and to develop characterization techniques for rapid material discovery via machine learning approaches. PIs: Hong Tang, Daniel Gall, Eric Pop, Chris Hinkle, Elton Graugnard, Judy Cha, Farhan Rana, Pillar tasks: 3137.026, 3137.044, 3137.025, 3137.024.

High-throughput materials discovery to develop new synthesis, characterization, and predictive methods to accelerate materials discovery, by identifying new materials for interconnects, oxide semiconductors, and ferroelectrics, developing deep learning methods for accelerated materials characterization, new synthesis routes and automated synthesis, and to demonstrate superior electronic materials on an accelerated timeline. PIs: Christopher Hinkle, Jing Kong, James Rondinelli, Judy Cha, Farhan Rana, Pillar tasks: 3137.020, 3137.025, 3137.030, 3137.037, 3137.038, 3137.046.

Advanced processing with focus on integration of materials into logic and memory devices against manufacturing constraints. To develop synthesis strategies to obtain high quality 2D materials at BEOL compatible temperatures with thickness/layer control, to enable ALD of ferroelectric materials beyond HZO and ultrahigh-k dielectrics, to establish automated and high-throughput materials synthesis and characterization to accelerate processing for improved properties across materials classes (interconnects, dielectrics, 2D materials, etc.), and to enable advanced integration strategies through area-selective deposition and etching. PIs: Elton Graugnard, Steve George, Greg Parsons, Jing Kong, Judy Cha, Asif Khan, Chris Hinkle, Pillar tasks: 3137.011, 3137.020, 3137.038, 3137.041, 3137.029, 3137.030, 3137.031, 3137.039, 3137.040, 3137.042.

High-k dielectrics & ferroelectrics for wide-bandgap transistors for high-efficiency gate drivers, RF and logic/memory hybrids. The main objective is the discovery of new high-K dielectric and ferroelectric barriers for wide-bandgap CMOS devices and circuits. PIs: Debdeep Jena, Farhan Rana, Hong Tang, Asif Khan, H. Grace Xing, Elton Graugnard, Chris Van de Walle, Pillar tasks: 3137.004, 3137.034, 3137.035.